scan insertion 基本流程

1. scan insertion flow

典型的scan insertion flow:

1. Start
2. Read Design
3. Create Test Protocol
4. DFT DRC
5. Specify Scan Architecture
6. Preview
7. Insert Scan Paths
8. DFT DRC Coverage
9. Handoff Design
10. Exit

2. 三种DRC(Design Rule Check)

There are three types of DRC runs that can be performed on a design with dft_drc:
在命令dft_drc时, 会在设计上执行三种DRC.

1. RTL DRC     : run during RTL development phase to identify DFT issue early in the flow.

2. Pre-DFT DRC : run prior to scan insertion to determine which scanable elements can be put on scan chains.
                 插入scan chain之前执行Pre-DFT DRC, 决定哪些单元可以放到scan chain上.

3. Post-DFT DRC: run after scan insertion to validate that the implemented scan chains can be traced.
                 插入scan chain之后执行, 用于验证scan chain可以trace.

                 Can be used to provide an ATPG coverage estimate.
                 可以评估下ATPG覆盖率.
                 Can extract scan chain information from an design with existing scan chains.
                 如果一个设计中已经存在scan chain, 可以用Post-DFT DRC从设计中抽取scan chain信息.

3. scan FF替换

set test_default_scan_style multiplexed_flip_flop # scan style选择带mux的寄存器.
compile_ultra -scan # FF要选用scan FF.

4. set_scan_state

set_scan_state

state可选值:

1. unknown: 所有寄存器被认定为是non-scan.
    使用read_verilog/read_vhdl命令后, 设计处于unknown状态.
    在这种状态下, dft_drc命令会执行Pre-DFT DRC.
    在这种状态下, insert_dft命令会在设计中插入scan(可能发生重复插链的情况).

2. test_ready: 所有寄存器被认定为已经替换为scan FF.
    使用compile -scan后, 设计处于test_ready状态.
    在这种状态下, dft_drc命令会执行Pre-DFT DRC.
    在这种状态下, insert_dft命令会在设计中插入scan.

3. scan_existing: 设计被认定为已经插入scan.
    使用insert_dft后, 设计处于scan_existing状态.
    在这种状态下, dft_drc命令会执行Post-DFT DRC.
    在这种状态下, insert_dft命令会重新建立scan chains.

原文地址：https://www.cnblogs.com/gaiqingfeng/p/16066190.html