Verilog 基本语法 - 参数、局部参数和 `define- I. 局部参数

  localparam是一种局部常量，只在声明该常量的模块中有效，不可用于模块与模块之间的参数传递。一般在定义仅用于模块内部的参数时使用localparam，比如状态机状态的定义声明。例如：

// FSM Sate
localparam IDLE         = 4'b0001;
localparam INPUT        = 4'b0010;
localparam DECODE       = 4'b0100;
localparam COMPLETE     = 4'b1000;

// FSM
always @(posedge clk or negedge rst_n) begin
    if(!rst_n) begin
        curr_state <= IDLE;
        //...
    end
    else begin
        case(curr_state) 
            IDLE:
            begin
            	if(start)
                    curr_state <= INPUT;
                else
                	curr_state <= IDLE;
                //...             
            end

            INPUT   :
            begin
                curr_state <= DECODE;
                //...
            end

            DECODE      :        
            begin
            	curr_state <= COMPLETE;
                //... 
            end

            ALL_COMPLETE:
            begin
            	curr_state <= IDLE;
            end

            default :;
        endcase
    end
end